Hardware/USB Host Controller: Difference between revisions
< Hardware
New page: {{Infobox MMIO | title = EHCI | arm = Full | base = 0x0d040000 | len = 0x100 | bits = 32 | armirq = unknown{{check}} }} {{Infobox MMIO | title = OHCI #0 | arm = Full | base = 0x0d050000 | ... |
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{{Infobox MMIO | {{Infobox MMIO | ||
| title = | | title = OHCI #1 | ||
| arm = Full | | arm = Full | ||
| base = | | base = 0x0d060000 | ||
| len = | | len = 0x200 | ||
| bits = 32 | | bits = 32{{check}} | ||
| armirq = unknown{{check}} | | armirq = unknown{{check}} | ||
}} | }} | ||
| Line 16: | Line 16: | ||
}} | }} | ||
{{Infobox MMIO | {{Infobox MMIO | ||
| title = | | title = EHCI | ||
| arm = Full | | arm = Full | ||
| base = | | base = 0x0d040000 | ||
| len = | | len = 0x100 | ||
| bits = 32 | | bits = 32 | ||
| armirq = unknown{{check}} | | armirq = unknown{{check}} | ||
}} | }} | ||
Revision as of 01:39, 26 February 2009
| OHCI #1 | |
| Access | |
|---|---|
| Broadway | None |
| Starlet | Full |
| Registers | |
| Base | 0x0d060000 |
| Length | 0x200 |
| Access size | 32[check] bits |
| Byte order | Big Endian |
| OHCI #0 | |
| Access | |
|---|---|
| Broadway | None |
| Starlet | Full |
| Registers | |
| Base | 0x0d050000 |
| Length | 0x200 |
| Access size | 32[check] bits |
| Byte order | Big Endian |
| EHCI | |
| Access | |
|---|---|
| Broadway | None |
| Starlet | Full |
| Registers | |
| Base | 0x0d040000 |
| Length | 0x100 |
| Access size | 32 bits |
| Byte order | Big Endian |