Hardware/NAND Interface: Difference between revisions
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{{reglist|NAND Interface}} | |||
{{rld|0x0d010000 (W)|32|NAND_COMMAND_BITMASK|a bitfield}} | |||
{{rld|0x80000000|1|NAND_COMMAND_ENABLE|this bit must be set for the command to be considered valid}} | |||
{{rld|0x1F000000|5|NAND_ADDR_MASK|these bits tell the NAND interface which of the address bytes from NAND_ADDR1/2 should be sent with this command}} | |||
{{rld|0x00FF0000|8|NAND_COMMAND|this is the actual 8-bit NAND command}} | |||
{{rld|0x0000F000|4|NAND_COMMAND_FLAGS|tbd}} | |||
{{rld|0x00000FFF|12|NAND_COMMAND_DMALEN|this tells the DMA engine how many bytes to copy}} | |||
{{rld|0x0d010000 (R)|32|NAND_STATUS}} | |||
{{rld|0x0d010004|32|NAND_CONFIG}} | |||
{{rld|0x0d010008|32|NAND_ADDR1}} | |||
{{rld|0x0d01000C|32|NAND_ADDR2}} | |||
{{rld|0x0d010010|32|NAND_DATABUF}} | |||
{{rld|0x0d010014|32|NAND_ECCBUF}} | |||
|} | |||
{| border="1" | {| border="1" | ||
! base !! function !! offset !! description !! contents/example | ! base !! function !! offset !! description !! contents/example | ||
Revision as of 03:37, 27 February 2009
| NAND Interface | |
| Access | |
|---|---|
| Broadway | None |
| Starlet | Full |
| Registers | |
| Base | 0x0d010000 |
| Length | 0x20 |
| Access size | 32 bits |
| Byte order | Big Endian |
| NAND Interface | |||
|---|---|---|---|
| Address | Bits | Name | Description |
| 0x0d010000 (W) | 32 | NAND_COMMAND_BITMASK | a bitfield |
| 0x80000000 | 1 | NAND_COMMAND_ENABLE | this bit must be set for the command to be considered valid |
| 0x1F000000 | 5 | NAND_ADDR_MASK | these bits tell the NAND interface which of the address bytes from NAND_ADDR1/2 should be sent with this command |
| 0x00FF0000 | 8 | NAND_COMMAND | this is the actual 8-bit NAND command |
| 0x0000F000 | 4 | NAND_COMMAND_FLAGS | tbd |
| 0x00000FFF | 12 | NAND_COMMAND_DMALEN | this tells the DMA engine how many bytes to copy |
| 0x0d010000 (R) | 32 | NAND_STATUS | |
| 0x0d010004 | 32 | NAND_CONFIG | |
| 0x0d010008 | 32 | NAND_ADDR1 | |
| 0x0d01000C | 32 | NAND_ADDR2 | |
| 0x0d010010 | 32 | NAND_DATABUF | |
| 0x0d010014 | 32 | NAND_ECCBUF | |
| base | function | offset | description | contents/example |
|---|---|---|---|---|
| 0x0D010000 | NAND | |||
| 0000 W | command | 9F000000 (CMD 00: start read sector) | ||
| 8030B840 (CMD 30: data (starts DMA 0x840 bytes)) | ||||
| 80FF8000 (CMD FF: reset) | ||||
| 00008000 means: wait for R/#B to go down | ||||
| 1F000000 is the mask of the address bytes to send. (10 = AA, 08 = BB, .., 01 = FF in 08,0c) | ||||
| 0000 R | status | MSB means busy | ||
| 0004 W | config | |||
| 0008 W | address #0 | 0000AABB | ||
| 000C W | address #1 | CCDDEEFF, NAND sector, multiply with 0x800 or 0x840 to get offset, 0x40 for ecc | ||
| 0010 W | data addr | target address for DMA (0x800 main bytes) | ||
| 0014 W | ecc addr | target address for DMA (0x40 spare bytes + 0x10 byte HW-calculated ECC syndrome) | ||
| 0018 W | unknown |