Difference between revisions of "User:Pcfree/PCWnP"

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| version    = 0.1 beta
 
| version    = 0.1 beta
 
| licence    = GPL
 
| licence    = GPL
| download    =  
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| download    = http://www.wiibrew.org/wiki/File:PCWnP_beta.zip
 
| website    =  
 
| website    =  
 
|  
 
|  
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== BACKGROUND ==
 
== BACKGROUND ==
I have a DIY external NAND programmer which I used it for a while as Wii NAND dumper/programmer.  Some people in Chinese forum asked me to share the design to save their bricked Wii.  My original design is a PCI based CPLD which cannot be DIY by most people.  Therefore, I design a new PC parallel port based simple Wii NAND programmer, and modify to port my old program to the new interface.  Although I do not make the new hardware by myself and the parallel port might be very slow, the design is simple and all source codes are included so that any technical user may verify if it is feasible and provides enhancement.
+
I have a DIY external NAND programmer which I used it for a while as Wii NAND dumper/programmer.  Some people in Chinese forum asked me to share the design to save their bricked Wii.  My original design is a PCI based CPLD which cannot be DIY by most people.  Therefore, I design a new PC parallel port based simple Wii NAND programmer, and modify to port my old program to the new interface.  I personally will not make the new hardware by myself and the parallel port might be very low efficient for such purpose.  However, the design is simple and all source codes are included so that any technical user may verify if it is feasible and provides bug corrections and enhancements.
  
 
Besides, the programs currently run on DOS environments (FreeDOS for MS-DOS).  You may also help to port to Linux or Windows environments.
 
Besides, the programs currently run on DOS environments (FreeDOS for MS-DOS).  You may also help to port to Linux or Windows environments.
  
== HARDWARE ==
+
== HARDWARE CIRCUITS ==
 
Most PC motherboards manufactured before one year should have build-in standard parallel port.  The hardware is designed to connect to PC bi-directional parallel port.
 
Most PC motherboards manufactured before one year should have build-in standard parallel port.  The hardware is designed to connect to PC bi-directional parallel port.
=== Component ===
+
=== Components ===
 
*DB25 male connector x 1
 
*DB25 male connector x 1
 
*74LVC245 x 2, identified as U1 and U2
 
*74LVC245 x 2, identified as U1 and U2
Line 47: Line 47:
 
#DB25-25, U1-10, U2-10, U3-10, U4-13 and 36 all are power ground and must connect to GND
 
#DB25-25, U1-10, U2-10, U3-10, U4-13 and 36 all are power ground and must connect to GND
 
#U1-20, U2-20, U3-20, U4-12 and 37 all are power VCC3 and must connect to 3.3V
 
#U1-20, U2-20, U3-20, U4-12 and 37 all are power VCC3 and must connect to 3.3V
=== Simplification (Careful to read) ===
+
=== Simplification (Read Carefully) ===
 
Parallel port uses standard 5V TTL interface.  That is why we need two 74LVC245 as buffers working between parallel port and NAND Flash.  There might be some simplifications we can make because, unlike stand 5V CMOS drives 5V output, standard 5V TTL output only drives HIGH level as 3.4~3.7V typically.  And it happens that the operation power supply for standard 3.3V devices such as NAND Flash could be up to 3.6V.  So if you have measured the HIGH level output of your parallel port is below 3.6V, you can '''raise your 3.3V VCC supply voltage''' to the same level so as to safely remove these two 74LVC245s and replace 74LVC374 with more popular 74HC374.  Of course you have to bypass signals originally buffered by 74LVC245.  For U1, you have to bypass pin 2, 3, 4, 5, 6, 7, 8 and 9 to pin 18, 17, 16, 15, 14, 13, 12, and 11.  For U2, bypass pin 2 and 3 to pin 18 and 17.
 
Parallel port uses standard 5V TTL interface.  That is why we need two 74LVC245 as buffers working between parallel port and NAND Flash.  There might be some simplifications we can make because, unlike stand 5V CMOS drives 5V output, standard 5V TTL output only drives HIGH level as 3.4~3.7V typically.  And it happens that the operation power supply for standard 3.3V devices such as NAND Flash could be up to 3.6V.  So if you have measured the HIGH level output of your parallel port is below 3.6V, you can '''raise your 3.3V VCC supply voltage''' to the same level so as to safely remove these two 74LVC245s and replace 74LVC374 with more popular 74HC374.  Of course you have to bypass signals originally buffered by 74LVC245.  For U1, you have to bypass pin 2, 3, 4, 5, 6, 7, 8 and 9 to pin 18, 17, 16, 15, 14, 13, 12, and 11.  For U2, bypass pin 2 and 3 to pin 18 and 17.
  
Line 56: Line 56:
 
The 5V TTL parallel port interface is '''NOT''' designed to safely hot-plug external devices.  Never plug the programmer into parallel port if only one end is powered.  The correct procedures would be as follows:
 
The 5V TTL parallel port interface is '''NOT''' designed to safely hot-plug external devices.  Never plug the programmer into parallel port if only one end is powered.  The correct procedures would be as follows:
 
#Disconnect external programmer from parallel port.
 
#Disconnect external programmer from parallel port.
 +
#Power off external programmer.
 +
#Put the NAND Flash into socket.
 
#Power on both PC and external programmer.
 
#Power on both PC and external programmer.
 
#Now it is safe to connect external programmer to PC parallel port.
 
#Now it is safe to connect external programmer to PC parallel port.
 
== SOFTWARE ==
 
== SOFTWARE ==
The software include WNPID.exe, WNPDUMP.exe and WNPPROG.exe.
+
The software include WNPID.exe, WNPDUMP.exe and WNPPROG.exe with source codes included.
 
*'''WNPID.exe''' can read NAND Flash ID.  It could be used to verify if your hardware circuits are functional.
 
*'''WNPID.exe''' can read NAND Flash ID.  It could be used to verify if your hardware circuits are functional.
 
*'''WNPDUMP.exe''' is used to dump NAND to image file.
 
*'''WNPDUMP.exe''' is used to dump NAND to image file.
 
*'''WNPPROG.exe''' is used to program NAND from image file.
 
*'''WNPPROG.exe''' is used to program NAND from image file.
 +
All of them run under DOS which could be FreeDOS, MS-DOS, PC-DOS, Dr-DOS or Windows XP /98 formatted DOS 7.x …  It is recommended you use USB or HDD booted DOS with disk caching enabled (run SMARTDRV.exe for Microsoft DOS series or LBACACHE for FreeDOS) to have better performance.
 +
 +
It is also suggested running WNPID first to verify your hardware and NAND Flash.  Then run WNPDUMP to backup the current contents of you NAND Flash for the very first time before trying WNDPROG to restore your old dump.

Revision as of 11:27, 12 June 2009

A Simple PC/DOS Parallel Port Based Wii NAND Programmer
General
Author(s)pcfree
TypePC Tool
Version0.1 beta
LicenceGPL
Links
Download


BACKGROUND

I have a DIY external NAND programmer which I used it for a while as Wii NAND dumper/programmer. Some people in Chinese forum asked me to share the design to save their bricked Wii. My original design is a PCI based CPLD which cannot be DIY by most people. Therefore, I design a new PC parallel port based simple Wii NAND programmer, and modify to port my old program to the new interface. I personally will not make the new hardware by myself and the parallel port might be very low efficient for such purpose. However, the design is simple and all source codes are included so that any technical user may verify if it is feasible and provides bug corrections and enhancements.

Besides, the programs currently run on DOS environments (FreeDOS for MS-DOS). You may also help to port to Linux or Windows environments.

HARDWARE CIRCUITS

Most PC motherboards manufactured before one year should have build-in standard parallel port. The hardware is designed to connect to PC bi-directional parallel port.

Components

  • DB25 male connector x 1
  • 74LVC245 x 2, identified as U1 and U2
  • 74LVC374 x 1, identified as U3
  • 48-pin TSOP to DIP socket (NAND Flash socket) x 1, identified as U4
  • 2.2K ohm resistor x1
  • Some capacitors required between 3.3V VCC and GND.

The 74LVC series components could be other TTL operating at 3.3V power with 5V tolerance I/O buffer. You will also have to generate 3.3V power by yourself or acquire it from motherboard.

Connections

  1. DB25-pin2,3,4,5,6,7,8,9 (DQ0-7) connect to U1-pin2,3,4,5,6,7,8,9 (A1-A8)
    DB25-2,3,4,5 also connect to U3-3,4,7,8 (D0-D3)
  2. DB25-1 (Strobe#) connects to U2-2 (A1)
  3. DB25-14 (AutoFeed#) connects to U2-3 (A2)
  4. DB25-16 (Init#) connects to U1-1 (DIR)
  5. DB25-17 (Sel#) connects to U3-11 (CK)
  6. DB25-11 (Busy) connects to U4-7 (R/B#)
    Also with one 2.2K ohm pull-up to 3.3V
  7. U1-18,17,16,15,14,13,12,11 (B1-B8) connect to U4-29,30,31,32,41,42,43,44 (IO 0-7)
  8. U1-19(OE#) connects to GND
  9. U2-18(B1) connects to U4-8(RE#)
  10. U2-17(B2) connects to U4-18(WE#)
  11. U2-19(OE#) connects to GND
  12. U2-1(DIR) connects to VCC (3.3V)
  13. U3-2(Q0) connects to U4-9(CE#)
  14. U3-5(Q1) connects to U4-16(CLE)
  15. U3-6(Q2) connects to U4-17(ALE)
  16. U3-9(Q3) connects to U4-19(WP#)
  17. U3-1(OE#) connects to GND
  18. DB25-25, U1-10, U2-10, U3-10, U4-13 and 36 all are power ground and must connect to GND
  19. U1-20, U2-20, U3-20, U4-12 and 37 all are power VCC3 and must connect to 3.3V

Simplification (Read Carefully)

Parallel port uses standard 5V TTL interface. That is why we need two 74LVC245 as buffers working between parallel port and NAND Flash. There might be some simplifications we can make because, unlike stand 5V CMOS drives 5V output, standard 5V TTL output only drives HIGH level as 3.4~3.7V typically. And it happens that the operation power supply for standard 3.3V devices such as NAND Flash could be up to 3.6V. So if you have measured the HIGH level output of your parallel port is below 3.6V, you can raise your 3.3V VCC supply voltage to the same level so as to safely remove these two 74LVC245s and replace 74LVC374 with more popular 74HC374. Of course you have to bypass signals originally buffered by 74LVC245. For U1, you have to bypass pin 2, 3, 4, 5, 6, 7, 8 and 9 to pin 18, 17, 16, 15, 14, 13, 12, and 11. For U2, bypass pin 2 and 3 to pin 18 and 17.

Billions of PC have been manufactured with various ASIC chips to implement parallel ports. Some may drive CMOS HIGH at exact 5V which will damage NAND Flash without 74LVC245s. Be carefully to try this and make sure you have measured the HIGH output level of your parallel port to be below 3.6V.

To measure HIGH level output of parallel port, try to probe DB25-1, 14 or 16 which usually are initialized by PC BIOS as HIGH level.

HARDWARE OPERATIONS

The 5V TTL parallel port interface is NOT designed to safely hot-plug external devices. Never plug the programmer into parallel port if only one end is powered. The correct procedures would be as follows:

  1. Disconnect external programmer from parallel port.
  2. Power off external programmer.
  3. Put the NAND Flash into socket.
  4. Power on both PC and external programmer.
  5. Now it is safe to connect external programmer to PC parallel port.

SOFTWARE

The software include WNPID.exe, WNPDUMP.exe and WNPPROG.exe with source codes included.

  • WNPID.exe can read NAND Flash ID. It could be used to verify if your hardware circuits are functional.
  • WNPDUMP.exe is used to dump NAND to image file.
  • WNPPROG.exe is used to program NAND from image file.

All of them run under DOS which could be FreeDOS, MS-DOS, PC-DOS, Dr-DOS or Windows XP /98 formatted DOS 7.x … It is recommended you use USB or HDD booted DOS with disk caching enabled (run SMARTDRV.exe for Microsoft DOS series or LBACACHE for FreeDOS) to have better performance.

It is also suggested running WNPID first to verify your hardware and NAND Flash. Then run WNPDUMP to backup the current contents of you NAND Flash for the very first time before trying WNDPROG to restore your old dump.